Next-Generation System Integration and R&D for Sustaining AI and HPC Growth

Please join us for this UQ RCC seminar with Intel's Dr Joshua Fryman. A complementary morning tea will be served after the seminar.

Next-Generation System Integration and R&D for Sustaining AI and HPC Growth

As data centers scale to multi-gigawatt (GW) capacities with 1 megawatt (MW) racks, the challenges in resource sustainability for delivering these technologies are increasing.

While businesses race to be the first to realise Artificial General Intelligence, the continuing increase of computing performance in an era after Dennard scaling failed means that the energy demand and power issues dominate the practical aspects of building such systems.

We are standing at a technology inflection point where the methods used previously for packaging, integration and interconnects of semiconductors will not be viable into the next decade. New methods of designing chips, packages, memories, and fabrics must rapidly converge for the next decade’s products to succeed.

This talk will provide an overview of current economic trends, historical technical performance factors, and demonstrate where technology scaling is not keeping pace with the demand from the current AI and HPC boom.

During the talk, concrete examples of novel hardware R&D programs related to memory technology, and software R&D related to performance optimisations, will be shown to motivate different ways to think about doing R&D.

The end of the talk will provide a proposed direction that next-generation products will have to adopt to deliver sustainable, continued performance growth for consumers.

Speaker:

Dr Joshua Fryman, Intel Fellow and Director of Intel Government Technology’s R&D Group

Dr Joshua Fryman is an Intel Fellow and Director of Intel Government Technology’s R&D group, setting the strategy and priorities for all external R&D between Intel and Public Sector sponsor agencies or commercial entities. He joined IGT from the Intel Corporation’s Office of the CTO.

Prior to his role in IGT, his work was primarily focused on applied R&D for commercial and government customers, focusing on problems that are 3-10 years out on the horizon.

Throughout his career, Dr Fryman has been engaged in multiple project types, from fabricating and testing circuits to designing microprocessor and system architectures, interconnects, packaging, compilers, runtimes, applications and algorithms.

In his role as Chief Architect or Principal Investigator (PI), Dr Fryman has led pre-exascale programs such as DARPA UHPC and DOE Fast Forward and Xstack. He has also played a pivotal role as PI for at-scale future AI and analytics programs such as DARPA HIVE, IARPA AGILE, and DOE’s Advanced Memory Technology efforts. His role as a PI also includes security programs such as DARPA GAPS and other appliances.

Dr Fryman obtained his BSc in Computer Engineering from the University of Florida and a PhD in Computer Architecture from Georgia Tech.

Renowned for his insights in the field, he is a frequently invited speaker on microelectronics, systems, packaging, integration, and hardware-software co-design topics.